15 research outputs found

    Activities of daily life recognition using process representation modelling to support intention analysis

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    Purpose – This paper aims to focus on applying a range of traditional classification- and semantic reasoning-based techniques to recognise activities of daily life (ADLs). ADL recognition plays an important role in tracking functional decline among elderly people who suffer from Alzheimer’s disease. Accurate recognition enables smart environments to support and assist the elderly to lead an independent life for as long as possible. However, the ability to represent the complex structure of an ADL in a flexible manner remains a challenge. Design/methodology/approach – This paper presents an ADL recognition approach, which uses a hierarchical structure for the representation and modelling of the activities, its associated tasks and their relationships. This study describes an approach in constructing ADLs based on a task-specific and intention-oriented plan representation language called Asbru. The proposed method is particularly flexible and adaptable for caregivers to be able to model daily schedules for Alzheimer’s patients. Findings – A proof of concept prototype evaluation has been conducted for the validation of the proposed ADL recognition engine, which has comparable recognition results with existing ADL recognition approaches. Originality/value – The work presented in this paper is novel, as the developed ADL recognition approach takes into account all relationships and dependencies within the modelled ADLs. This is very useful when conducting activity recognition with very limited features

    Automatic classification of digital communication modulation schemes

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    Digital modulation recognisers based on feed-forward neural networks

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    Stochastic Computing with Spiking Neural P Systems

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    This paper presents a new computational framework to address the challenges in deeply scaled technologies by implementing stochastic computing (SC) using the Spiking Neural P (SN P) Systems. SC is well known for its high fault tolerance and its ability to compute complex mathematical operations using minimal amount of resources. However, one of the key issues for SC is data correlation. This computation can be abstracted and elegantly modeled by using SN P systems where the stochastic bit-stream can be generated through the neurons spiking. Furthermore, since SN P systems are not affected by data correlations, this effectively mitigate the accuracy issue in the ordinary SC circuitry. A new stochastic scaled addition realized using SN P systems is reported at the end of this paper. Though the work is still at the early stage of investigation, we believe this study will provide insights to future IC design development

    LFSR based S-box for lightweight cryptographic implementation

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    This paper presents the hardware implementation of the Linear Feedback Shift Register (LFSR) based Substitution Box (S-Box) using ALTERA FPGA platform. Unlike the conventional designs, the proposed architecture is low in terms of its hardware cost; the total area and power consumptions. Hence, the new LFSR based S-box can be deployed in block ciphers to achieve lightweight cryptographic implementations

    Survey on the applications of artificial neural networks in computer games

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    Abstract not available

    Stochastic computing with spiking neural P systems

    No full text
    This paper presents a new computational framework to address the challenges in deeply scaled technologies by implementing stochastic computing (SC) using the Spiking Neural P (SN P) Systems. SC is well known for its high fault tolerance and its ability to compute complex mathematical operations using minimal amount of resources. However, one of the key issues for SC is data correlation. This computation can be abstracted and elegantly modeled by using SN P systems where the stochastic bit-stream can be generated through the neurons spiking. Furthermore, since SN P systems are not affected by data correlations, this effectively mitigate the accuracy issue in the ordinary SC circuitry. A new stochastic scaled addition realized using SN P systems is reported at the end of this paper. Though the work is still at the early stage of investigation, we believe this study will provide insights to future IC design development.Published versio
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